Embedded Intelligence Publications

ARTICLES IN PROCEEDINGS

Alarcón, R. Salvador, F. Moreno and I. López. “A New Real-Time Hardware Architecture for Road Line Tracking Using a Particle Filter”. Proceedings of the 32nd Annual Conference of the IEEE Industrial Electronics Society, IECON’06, pp. 736-741 Paris (France), Nov. 2006. ISBN 978-1-4244-0136-4.

Ignacio López,Rubén Salvador,Jaime Alarcón, and Félix Moreno. “Architectural design for a low cost  FPGA-based traffic signal detection system in vehicles”. Proceedings of SPIE VLSI Circuits and Systems, Vol. 6590, Microtechnologies for the New Millenium 2007, 2-4 de Mayo, 2007. Maspalomas, Gran Canaria, Spain. DOI 10.1117/12.721694. ISBN 9780819467188.

Ignacio López, Ricardo Sanz, Félix Moreno, Rubén Salvador, Jaime Alarcón, ”From Cognitive Architectures to Hardware:  A low-cost FPGA-based design experience”. IEEE International Symposium on Intelligent Signal Processing, WISP 2007. Alcalá de Henares-Madrid (Spain) Oct.2007, Páginas: 499-504 ISBN: 1-4244-0830-6

F. Moreno, J. Alarcón, R. Salvador, T. Riesgo, “FPGA implementation of an image recognition system based on tiny neural networks and on-line reconfiguration” Conference of the IEEE Industrial Electronics Society (IECON), pp. 2445-2452. November 2008 Orlando, Florida (USA) ISBN: 978-1-4244-1766-7 ISSN:1553-572x.

Salvador, R.; Terleira, C.; Moreno, F.; Riesgo, T. “Approach to an FPGA embedded, autonomous object recognition system: run-time learning and adaptation”. Proceedings of SPIE VLSI Circuits and Systems, Vol. 7363, Microtechnologies for the New Millenium 2009, 4-6 de Mayo, 2009. Dresde, Germany. ISBN: 978-0819-4763-71.

Rubén Salvador, Félix Moreno, Teresa Riesgo and Lukas Sekanina. “Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems”. 2010 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2010). 15-18 de Junio en California, EEUU. IEEE Circuits and Systems Society (IEEE-CAS)  y ACM Special Interest Group on Design Automation (ACM-SIGDA). Publicación de los proceedings por parte de IEEE Computer Society. pp: 177-184 . ISBN: 978-1-4244-5888-2.

Rubén Salvador, Félix Moreno, Teresa Riesgo and Lukas Sekanina. “High level validation of an optimization algorithm for the implementation of adaptive Wavelet Transform in FPAGs”. 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. 1-3 de Septiembre Lille, Francia. IEEE Computer Society pp.: 96-103. ISBN: 978-0-7695-4171-6.

Félix Moreno, Ignacio López and Ricardo Sanz. “A design process for hardware/software system co-design and its application to designing a reconfigurable FPGA”. 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools. 1-3 de Septiembre Lille, Francia. IEEE Computer Society pp.: 556-562. ISBN: 978-0-7695-4171-6.

Rubén Salvador, Alberto Vidal, Félix Moreno, Teresa Riesgo, Lukas Sekanina. “Bio-inspired FPGA Architecture for Self-Calibration of an Image Compression Core based on Wavelet Transforms in Embedded Systems”. SPIE 2011. 18-20 April 2011. Prague, Czech Republic. ISBN

Félix Moreno and David Aledo. “The DLMT. An alternative to the DCT”. IECON 2011, the 37th Annual Conference of the IEEE Industrial Electronics Society. Melbourne, Australia, pp. 2267-2272, November 2011. ISBN 978-1-61284-971-3

 ARTICLES IN JOURNALS AND BOOK CHAPTERS

Aparicio, F., Páez, J., Moreno, F., Jiménez, F. and López, A. “Discussion of a new adaptive speed control  system incorporating the geometric characteristics of the roadway”. Int. J. Vehicle Autonomous Systems, Vol. 3, No. 1, pp.47-64. Inderscience 2005, United Kingdom. Impact factor: 0,7 (5 de 16)ISSN: 1471-0226.

Ignacio López,Rubén Salvador,Jaime Alarcón, and Félix Moreno. “Embedded Architecture Enables Intelligent Vehicles”. SPIE Newsroom, 2007. DOI: 10.1117/2.1200708.0822 ISSN: 1818-2259.

F. Moreno, J. Alarcón, R. Salvador and T. Riesgo. “Reconfigurable Hardware Architecture of a shape recognition system based on specialized Tiny Neural Networks with on-line training”. IEEE Transaction on Industrial Electronics. (pp. 3253-3263. August 2009. Vol. 56, Nº 8). ISSN 0278-0046. Impact factor: 5,468 (1 de 229)

F. Moreno, I. López and R. Sanz, “Embedded Intelligence on Chip: Some FPGA-based design experiences”.  Book “Pattern Recognition. Recent Advances”. Ed. IN-TECH-2010. pp. 379-404. ISBN: 978-953-7619-90-9.

R. Salvador, F. Moreno, T. Riesgo and L. Sekanina. “Evolutionary approach to improve wavelet transforms for image compression in embedded systems”. EURASIP, Journal on Advances in Signal Processing. Hindawi Publishing Co. (pp. 1-20, Vol. 2011, January 2011). ISSN: 1687-6172. e-ISSN: 1687-6180. Impact factor: 1,074.

Rubén Salvador, Alberto Vidal, Félix Moreno, Teresa Riesgo and Lukas Sekanina. “Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling”. pp. 427-438  Microprocess. Microsyst. (No. 36. Jun. 2012), Elsevier B.V. doi:10.1016/j.micpro.2012.02.002. Impact factor: 0,545 (173 de 247; en ENGINEERING, ELECTRICAL & ELECTRONIC)