There are two new Post-Doc Positions open at University of Sassari (Sardinia, Italy) on embedded systems design topics. Please find the announcements below.

******* Assistant Professor: ALOHA H2020 Project *******

The Intelligent system DEsign and Application (IDEA, http://idea.uniss.it/) laboratory of the University of Sassari (UNISS) invites applications for a post-doc position as Assistant Professor in the areas of embedded system design. We seek outstanding applicants who have demonstrated research expertise in the design of low power hardware. This 3 years position is going to be founded within the scope of the H2020 project “ALOHA – software framework for runtime-Adaptive and secure deep Learning On Heterogeneous Architectures” that will start in January 2018.

The main goal of the ALOHA H2020 project is to facilitate implementation of Deep Learning (DL) algorithms on heterogeneous low-energy computing platforms. ALOHA is meant to foster the pervasive adoption of such algorithms in the embedded domain. In the context of ALOHA, the IDEA lab is seeking for an experienced researcher willing to work autonomously in such an international project on design automation and customization of low-power/low-energy reconfigurable domain-specific accelerators for DL. The candidate will be involved in the following activities:

1. Modeling and implementation of application specific hardware accelerators.

2. Runtime reconfigurability studies for system adaptivity support and for energy-/power-related optimization.

3. Definition of the programmability support and interfaces/adapters for different target architectures.

4. Integration of all the envisioned strategies/techniques in the ALOHA framework and heterogeneous reference platform.

BASIC QUALIFICATIONS: Ph.D. in electronic engineering, computer engineering, or computer science field; or (equivalently) 3 years of expertise on the topics relevant to the call, with demonstrated record of research activities. Previous team working experiences and expertise in the coordination of small/medium research tasks are highly appreciated.

PREFERRED SKILLS: Digital hardware design and HDL languages (Verilog, VHDL), experience with digital hardware testing and simulation, programming languages knowledge (C, C++).

POSITION AVAILABLE: Selection procedures open in January/February 2018. Position starts in March/April 2018.

INFORMATION: If you are interested in this position and want to have more details about it, please contact Dr. Francesca Palumbo (fpalumbo@uniss.it), who is UNISS responsible for ALOHA.

******* Research Assistant: CERBERO H2020 Project *******

The Intelligent system DEsign and Application (IDEA) laboratory of the University of Sassari (UNISS), http://idea.uniss.it/, invites applications for a post-doc position as Assistant Professor in the areas of embedded system design. We seek outstanding applicants who have demonstrated research expertise in the2-yearn of low power hardware. This 2 year position is going to be founded within the scope of the H2020 project “CERBERO – Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments”, started in January 2017 (http://www.cerbero-h2020.eu/). It is an international project involving 12 different partners from industry and academy, coming from 7 different countries.

The main goal of the CERBERO project is the development of a design environment for CPS based on two pillars: a cross-layer model based approach to describe, optimize, and analyze the system and all its different views concurrently; an advanced adaptivity support based on a multi-layer autonomous engine. In the context of CERBERO, the IDEA lab is seeking for an experienced researcher willing to work autonomously in such an international project on self-reconfigurable hardware-software platforms. The candidate will be involved in the following activities:

1. modelling and implementation of a runtime reconfigurable substrate;

2. implementation of self-reconfiguration strategies for FPGA-based domain specific accelerators;

3. definition of the programmability support for the envisioned heterogeneous computing blocks;

4. integration of all the envisioned components/techniques in the CERBERO design environment.

BASIC QUALIFICATIONS: Ph.D. in electronic engineering, computer engineering, or computer science field; or (equivalently) 3 years of expertise on the topics relevant to the call, with demonstrated record of research activities. Previous team working experiences and expertise in the coordination of small/medium research tasks are highly appreciated.

PREFERRED SKILLS: knowledge of digital hardware design and HDL languages (Verilog, VHDL), experience with digital hardware testing and simulation, knowledge of C and Java languages.

POSITION AVAILABLE: Selection procedures open in January/February 2018. Position starts in March/April 2018.

INFORMATION: If you are interested in this position and want to have more details about it, please contact Dr. Francesca Palumbo (fpalumbo@uniss.it), who is CERBERO scientific coordinator and UNISS responsible for the open position.