Project duration: 4 months
Start date: 10 September 2012
Start date: 10 September 2012
Funded by: Thales Alenia Space España S.A
Principal investigator: Eduardo de la Torre
Researchers: Eduardo de la Torre, Andrés Otero, Filip Velcovic
Researchers: Eduardo de la Torre, Andrés Otero, Filip Velcovic
Partners
- Thales Alenia Space
- UPM-CEI
Description:
The target of this project is the design and prototyping of a development board and the characterization of applications that will be implemented in a RAM based FPGA, together with a set of methods that will allow realize HW reconfiguration of the FPGA partially and/or totally and dynamically, and simultaneously remotely and autonomously.
Acording to the requirements of Thales, the boards should allow to evaluate:
Según los requisitos iniciales propuestos por la empresa Thales, las placas deben permitir evaluar:
- Capacity of the FPGA regarding to used resources
- To measure parameters and performance of the system like frequency
- To measure the starting, normal working and reconfiguration power consumption